We're sorry but this page doesn't work properly without JavaScript enabled. Please enable it to continue.
Feedback

Formal Metadata

Title
P4 in Nix
Subtitle
Bringing hardware accelerated network to the masses!
Title of Series
Number of Parts
542
Author
License
CC Attribution 2.0 Belgium:
You are free to use, adapt and copy, distribute and transmit the work or content in adapted or unchanged form for any legal purpose as long as the work is attributed to the author in the manner specified by the author or licensor.
Identifiers
Publisher
Release Date
Language

Content Metadata

Subject Area
Genre
Abstract
Nix, and by extension NixOS, are incredible tools to define infrastructures and deployments of dedicated machines. Unfortunately, sometimes the load is too big for even an optimized network stack and we need to get dedicated equipment such as load balancers to handle the load. What if we could configure those from within Nix? P4, a Domain Specific Language intended to produce highly optimized network processing code, allows for that. It can produce code that can be synthesized to FPGAs or even configure network ASICs in order to have optimized solutions to those problems. Points we'll touch on: Writing a transpiler in Nix, Automatic (re-)deployment of synthesized code, hardware definition for Nix-reprogrammable hardware.