We're sorry but this page doesn't work properly without JavaScript enabled. Please enable it to continue.
Feedback

The Ides of RISC-V

Formal Metadata

Title
The Ides of RISC-V
Subtitle
Writing & Testing a Parallel Caesar Cipher in RISC-V
Alternative Title
The Ides of RISC-V: A vectorized Caesar cipher written in RISC-V assembler and tested in an emulator
Title of Series
Number of Parts
637
Author
License
CC Attribution 2.0 Belgium:
You are free to use, adapt and copy, distribute and transmit the work or content in adapted or unchanged form for any legal purpose as long as the work is attributed to the author in the manner specified by the author or licensor.
Identifiers
Publisher
Release Date
Language

Content Metadata

Subject Area
Genre
Abstract
I will demonstrate how to write a vectorized (parallel) Caesar cipher in RISC-V (in assembler) using the project's emulator. Using the emulator is necessary at this point for such an application because the vectorized extension to the RISC-V ISA is not standardized. I will further demonstrate how the emulator itself is able to emulate the execution of a single user-space application when it is actually designed to emulate an entire system. This will involve a demonstration and explanation of riscv-isa-sim, riscv-pk and their interaction.