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TerosHDL: An open-source IDE for FPGA

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 Alberto, Carlos Rojo, Ismael Perez Saez, Alfredo

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TerosHDL: An open-source IDE for FPGA
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The goal of TerosHDL is make the VHDL/SV/Verilog development easier and reliable. It is a powerful open source IDE based on VSCode
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TerosHDL, an open HDL IDE
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637
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CC Attribution 2.0 Belgium:
You are free to use, adapt and copy, distribute and transmit the work or content in adapted or unchanged form for any legal purpose as long as the work is attributed to the author in the manner specified by the author or licensor.
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Abstract
TerosHDL is an open source project focused in the development and integration of EDA tools in an IDE. It's currently based on VSCode and Atom. The goal of TerosHDL is bringing all facilities of software code tools to the HDL development: linter, code completion, simulators management, automate documentation, snippets… TerosHDL is an open source project focused in the development and integration of EDA tools in an IDE. It is currently based on VSCode and Atom. The goal of TerosHDL is bringing all facilities of software code tools to the HDL development: linter, code completion, simulators management, automate documentation, snippets… We will introduce TerosHDL VSCode with multiple features. In the new release the architecture has been completely rebuild, reduce some dependencies and clarify the code. Some of the new features are: - Verilog/SystemVerilog support. - Linter. - Dependencies viewer. - State machine viewer. - More beautiful documentation.