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Programming Reconfigurable Devices via FPGA Regions & Device Tree Overlays

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Title
Programming Reconfigurable Devices via FPGA Regions & Device Tree Overlays
Subtitle
A User View Benchmark on a Declarative Reconfiguration Framework
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611
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CC Attribution 2.0 Belgium:
You are free to use, adapt and copy, distribute and transmit the work or content in adapted or unchanged form for any legal purpose as long as the work is attributed to the author in the manner specified by the author or licensor.
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Production Year2017

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Abstract
We share our experiences with a new framework in the Linux kernel forprogramming reconfigurable devices, namely MPSoC-FPGAs. Our example use caseintegrates reconfigurable hardware accelerators into the Crypto API. We applya new, declarative and device-tree-driven reconfiguration framework within theLinux kernel as proposed and implemented by Alan Tull. The implemented conceptmaps reconfigurable regions within the FPGA to device tree nodes. Theinsertion of a device tree overlay triggers the reconfiguration of thecorresponding reconfigurable region. The reconfiguration process consists ofthe scheduling, descheduling and execution phase. Based on our usecase,benchmark results for the scheduling phases are shared. We present thebottlenecks revealed by our benchmark and show currently missing components ofthis approach. We conclude that the current implementation is already in ausable state for developing and deploying MPSoC-FPGA based heterogeneoussystems.