FPGAs in SDR -- Why, when, and how to use them (with RFNoC)
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00:00
Computer hardwareDigital signalField programmable gate arraySoftware-defined radioMemory managementAnalogyDynamic random-access memoryDisintegrationDigital electronicsSoftwareComputer programFilter <Stochastik>InternetworkingSoftware-defined radioSoftwareQuicksortArrow of timeDigital signalTracing (software)Multiplication signLine (geometry)AnalogyDigital electronicsMereologyDifferent (Kate Ryan album)Flock (web browser)Presentation of a groupBitComputer hardwareChainData conversionConnected spaceFunction (mathematics)CASE <Informatik>Slide ruleScheduling (computing)Connectivity (graph theory)Goodness of fitFlip-flop (electronics)Bit rateProgrammer (hardware)DampingSingle-precision floating-point formatSoftware developerLevel (video gaming)Field programmable gate arrayField (computer science)XML
05:49
Field programmable gate arrayStructural loadUDP <Protokoll>DreizehnComputer networkControl flowProgrammschleifeCommunications protocolBuildingPeripheralDigital electronicsSource codeNichtlineares GleichungssystemDigital signalRead-only memoryArchitectureLogicFunctional (mathematics)Digital electronicsDialectRecursionBinary fileFast Fourier transformBlack boxQuicksortMultiplication signConnected spaceDescriptive statisticsChainSpacetimeSlide ruleStack (abstract data type)LoginPoint (geometry)Connectivity (graph theory)Hand fanFunction (mathematics)Exception handlingControl systemSoftware developerMereologyArtificial neural networkDemo (music)Goodness of fitPrice indexPersonal identification numberCycle (graph theory)Heegaard splittingBitSoftwareShift registerFilter <Stochastik>WhiteboardRevision controlComputer programmingKey (cryptography)ConvolutionStreaming mediaGraphical user interfaceProgramming languageTable (information)Order (biology)WebsiteSource codeLevel (video gaming)Nichtlineares GleichungssystemContent (media)BefehlsprozessorTask (computing)Complex (psychology)TransponderSoftware-defined radioHardware description languageProgrammschleifeField programmable gate arrayDigitizingFlip-flop (electronics)Reverse engineeringSource codeXML
11:33
Digital signalLogicNichtlineares GleichungssystemDigital electronicsType theoryInterface (computing)Read-only memoryArchitectureFlip-flop (electronics)Serial portShift registerDigital electronicsBitQuicksortMultiplication signComputer simulationComputer animationLecture/Conference
12:06
LogicSession Initiation ProtocolDigital electronicsOvalWeb browserExploratory data analysisSoftwareComputer networkTheoryBlock (periodic table)AlgorithmSpectrum (functional analysis)Mathematical analysisMultiplication signLogicQuicksortMereologySpectrum (functional analysis)CalculationComputerEstimatorModul <Datentyp>Fast Fourier transformSlide ruleSoftware-defined radioShift operatorField programmable gate arrayRight angleDigital electronicsPoint (geometry)CodeDescriptive statisticsLevel (video gaming)Band matrixFLOPSMusical ensembleFlock (web browser)RandomizationChainFunction (mathematics)outputRange (statistics)BitBlack boxOpen sourceStreaming mediaError messageMetropolitan area networkFlip-flop (electronics)Shared memoryCartesian coordinate systemBlock (periodic table)WhiteboardSoftware developerMathematicsComputer programmingPresentation of a groupSoftwareConnected spaceNumberExtension (kinesiology)Software frameworkStructural loadFreewareAverageGoodness of fitBit rateConstraint (mathematics)Peer-to-peerComputer animationLecture/Conference
18:39
Software-defined radioCartesian coordinate systemString (computer science)
19:29
SynchronizationLaptopSampling (statistics)Cartesian coordinate systemBlock (periodic table)Electronic visual displayVisualization (computer graphics)Source codeXMLProgram flowchart
20:09
Scripting languageIntegrated development environmentRight angleCuboidFunction (mathematics)Source codeProgram flowchartComputer animation
20:45
BitMedical imagingComputer fileFunction (mathematics)InformationProcess (computing)Band matrixMulti-core processorArmSource codeComputer animation
21:28
Domain nameArchitectureBlock (periodic table)Flow separationTime domainSoftware-defined radioMultiplication signQuicksortModul <Datentyp>Tap (transformer)Function (mathematics)Connectivity (graph theory)CodeSoftware frameworkArrow of timeProcess (computing)BefehlsprozessorRight anglePosition operatorError messageBlock (periodic table)Point (geometry)ComputerAxiom of choiceSelectivity (electronic)Fast Fourier transformLine (geometry)Cartesian coordinate systemMobile appBootingComputer animation
24:54
Source codeRight angleBlock (periodic table)Module (mathematics)Endliche ModelltheorieComputer animationLecture/Conference
25:25
Software-defined radioBlock (periodic table)Demo (music)Parallel portStudent's t-testInformationTheorySoftware development kitModulo (jargon)Module (mathematics)Maxima and minimaRight angleComputer fontModule (mathematics)Repository (publishing)Cartesian coordinate systemFunction (mathematics)Block (periodic table)Type theorySampling (statistics)Server (computing)Parameter (computer programming)Computer fileGame controllerError messageoutputEmailElectronic mailing listDifferent (Kate Ryan album)Software development kitBlogUniform resource locatorSignal processingStack (abstract data type)Endliche ModelltheorieBlock codeLine (geometry)Computer configurationCodeScripting languageComputer hardwareStudent's t-testArithmetic meanData structureIntegrated development environmentMereologyAsynchronous Transfer ModeDeclarative programmingSoftwareMedical imagingGraph coloringINTEGRALDevice driverConnected spaceComputerCrash (computing)AliasingFunctional (mathematics)IdentifiabilitySource codeInterface (computing)AlgorithmTape driveGraphical user interfaceField programmable gate arrayPresentation of a groupCase moddingFloating pointArrow of timeComputer animationLecture/Conference
32:24
Data structureBlock (periodic table)Field programmable gate arrayComputer-generated imageryScripting languageCodeComputer fileBlock (periodic table)Medical imagingSoftwareMereologyoutput1 (number)Software testingMultiplication signError messageDataflowGoodness of fitGraph (mathematics)Scripting languageGame controllerElectric generatorInterface (computing)BitData structureFunction (mathematics)CuboidSkeleton (computer programming)Functional (mathematics)Software frameworkRepository (publishing)Uniform resource locatorModule (mathematics)BlogRight angleComputer hardwareAsynchronous Transfer ModeConnected spaceWindowAddress spaceLine (geometry)Graphical user interfaceImplementationData loggerUniformer RaumFast Fourier transform
39:06
Multiplication signRight angleArithmetic meanInclusion mapEndliche ModelltheorieQuicksortComputer animationLecture/Conference
39:45
Execution unitCuboidProof theoryRight angleComputer animationLecture/Conference
40:18
Gamma functionLecture/ConferenceComputer animation
Transcript: English(auto-generated)
00:11
Okay The next talk is 45 minutes in the schedule, why is that why is it special? So it's actually shorter because we took two presentations and if we squish them together in a single one, so Nicholas
00:29
So yeah, so Nicholas will probably giving the more interesting part and I'll giving this introductory to the following question FPGA is why when and how to use them with our knocks or part one is why when and then part two is how and
00:42
Now last year I gave a similar presentation. So you might and just someone there Yep one guy, okay good if it's one guy then I'm not too bad If it's two guys and that's not too bad I didn't want to bore people, but I also didn't want to give the same presentation twice and
01:01
There was something that we've realized sort of and actually this goes back to the panel You know, we sometimes start in the middle. So Basically last year. So well you want to do FPGA is more accelerated blah blah blah And this is what you do and then I think Daniel this morning gave a really good presentation. It started from basically scratch
01:20
You know Everyone calm down. We want to do ham radio. This is what we do. It's it's not that hard And I I felt I felt that was a good approach. And so today I will actually talk about something very basic which is Why do we even have FPGA why would we want them now if you know all of this and I want to apologize
01:40
The next 10 minutes will be not the most enlightening, but I do feel just from conversations with people It's sometimes nice to sort of start from zero until I guess assuming, you know, nothing Why is this interesting and that is exactly what I'm gonna talk right now now first of all
02:01
We always assume that everyone knows what an SDR looks like and But maybe that's not true. And here's sort of a very very very very high level schematic It's really hard to to get any in your high level than this and We start on this sort of the analog side, which I'm completely gonna ignore now
02:21
So this is all everything that's in tenors and filters and whatnot I Guess I Hopefully spoke loud enough to pick up the first couple of minutes. It's like Half an hour ago was stationed during asking people the same question. How could you possibly forget the microphone?
02:44
Let's not talk about that today We've already talked about a disease and Dax a little bit and what comes out of those is digital data now on most Commercially available software radios and by the way, I work for a company that build software radios They looked like that, but it's not limited to that. Like this is sort of this is sort of the generic design that you always have
03:05
Data coming from the deck goes into an FPGA and then between the FPGA and your actual software running so you can radio for example, you will have some kind of transport something that is Getting the data from the FPGA into your software. That's also something
03:20
I don't really want to talk about now, but there's a difference between those black lines and those orange lines, which is The black lines are typically PCB traces as a matter of fact or something similar Some some local connector whereas the orange thick arrow could be anything so network I don't know. It could be through the internet. I for for all I care
03:45
Okay, and here we have an FPGA. What the hell does this guy do and what is it? So first of all, what is an FPGA and I just copy and paste at the Wikipedia Definition here integrated circuit designed to be configured by a customer designer after manufacturing hence field programmable
04:01
Okay, so let's let's dissect that so we have a user definable digital circuit So the digital is sort of something like if you go and sort of the very very modern things They will actually people will actually start Implementing analog components on FPGA and then technically I think we shouldn't be calling them FPGAs anymore But the name is just stuck. So let's stick with that
04:24
Going back to this slide We have an output of the DAC and then somewhere we have maybe a network connection and then we have something that we can define So so when we when we saw that the hardware we say, okay, this is yet to be defined But it's a digital hardware circuit. So that's important to to keep in mind We we will have you know flip-flops and etcetera somewhere in there, but we like at the time when we manufacture it
04:45
We don't know yet what they are That's that's a thing to keep in mind and Even after shipping the device we can readily change that basically at any time with some caveats and
05:00
What is the typical clock rate for such an FPGA well, you know that varies there's not there's not something You know, there's no one answer to that question, but it's not gigahertz It's usually typically in the order of several hundred megahertz Now if you think hundred megahertz and this one's beautiful does that sound like a lot if you come from a software world Maybe it doesn't but it's actually more than you need in most cases and I will tell you why
05:22
In a sec. So yes In a sec Phil Don't be so impatient drink some club mate so I Actually have a lot of colleagues that like me Studied electrical engineering and then started doing software But if you study lecturing you handle stuff like this in class and if you remember what you did in school
05:46
You're you have all the knowledge you need to get started with FPGA development So how do we even? Program such an FPGA. Now the matter of fact, I will show one show demo here so there's there is one buried somewhere in here and
06:00
This is something that I will be programming reprogramming all the time. And how does that even happen? So on a very high level four steps, first of all Define your circuitry. It's like, okay. What do we even want to achieve? And this will be all kinds of things I said Oh, yeah We have the ADC on the one side and we have some kind of transpond the other and everything that's in between Needs to be defined in order for something useful to come out of it. So I need to
06:25
Design the digital circuit that then later on I will actually be requiring We have ways to encode that for example, we have programming languages called verilog and the HDL which sort of our textual descriptions There are graphical tools and Honestly, I'm not a fan of graphical tools in general for FPGA development. They make more sense than for
06:45
Co-development I feel because what you are right what you are developing at the end of the day is a digital circuit And we are used to dealing with schematics Practically though if you if you're maintaining this you will probably use verilog or VHDL and for good reason
07:02
So now comes the the black box part So we take this say verilog or VHDL or whatever and then we turn it into a bitstream it's like sort of the compile step in software and This is sort of a binary file that is usually proprietary And we like we don't exactly know what's in there except people have reverse engineered it
07:22
Point I'm trying to make is at this point you will be like relying a lot on proprietary tools and Tool chains there are exceptions to this But this is something we currently have to live with now once we have the bitstream This is actually an instruction for the FPGA how to internally reconfigure itself so we have some pins Let's say like here. We can load that that bitstream, and then that's that's what we do and
07:46
If you buy a eval board those will be very obviously exposed I have pictures of those and what can we use them for well can you run software? So there's sort of a typical question we could but the way we run software And it is we reconfigure the digital circuit to behave like a CPU, and then it runs software
08:02
It's typically not a very efficient use of our FPGA so if you have a digital circuit that you can draw out that's something you would want to put on an FPGA and Something to keep in mind is you have a lot of space in some of these FPGAs you can take data from everywhere and do things You know in several places at the same time you can sort of split it in several regions and every one of those can
08:24
Be handling a sub task at the same time So the design philosophy here is very very very deep, and I can't cover it in five minutes, but Here's sort of a typical example. This is an FFT As a as a digital circuit
08:42
And this is something where it's very obvious that you can Put it on an FPGA if you if you were to put this in software for example You'd be writing some kind of recursive function maybe and then you have to deal with stacks something something something but on an FPGA It's very easy you have data on the left-hand side And then it sort of gets clocked through from left to right and at the output you have your FFT a couple of clock cycles
09:01
It's very nice, so FFTs filters and neural networks examples of things that are easily implementable on FPGAs control loops also nice because I Mentioned this here we can control latency very tightly It's nice for control loops if we have to do sort of complex decision-making It can get difficult now as I said earlier we can replace the contents of an FPGA
09:25
We can't do it any time willy-nilly because one of the reasons is This is like a big part of our SDR And it'll take down certain pieces of the rest of the component of the SDR if we do so So this is copied from a schematic of this device. Which is a downloadable on
09:42
the Edis website and So I don't want to go into detail, but this here is basically the FPGA and it has certain components connected to it Okay, I cropped them out that was stupid, but like the whole point of this slide was to show that here
10:00
We have a network connection ethernet Actually, no, that's not true. We do not, but let's say we have And we are talking to that FPGA over the ethernet connection and then reprogram it down goes that ethernet connection There's something to keep in mind so There are three major challenges
10:20
For FPGA development the first one is sort of the digital logic part and if you can't come out of as I said earlier in EE school, you will be familiar with this so What's this equation as a digital circuit? And what is this equation? You someone said it? It's a convolution. So could you draw that out out as an as a digital circuit?
10:41
It's not a trick question Do you think you could do that? Yeah, I mean it's not not not hard but we have We basically add a bunch of things and the bunch of things we add up are delayed versions of a signal multiplied by something else so I could use the whiteboard to do that, but I don't want to steal Nicolas time, but
11:04
Here's here's an example, what does this do The reverse to the other question It's a shift register. Yes so And if the purpose of this is and actually copy this from we computed that there is a you can't see it here there's the
11:21
The this the source is listed the purpose of this circus is to have a serial connection here serial data coming in and We shift so we have data here then we have a clock signal and sort of toggles these flip-flops we do this four times and then the the bit that was here got all all the way here and then the
11:43
One after that is here the one after that's here. So so we have four bits. So now we have Gone from serial to parallel. So it's a serial in parallel shift register circuit. I think this is Fairly, I you know, I hate saying this is easy, but you know because I started it blah blah But I think this these are concepts that are
12:03
Tangible I think you can play around with simulators You'll you will get very far and I I would love to hear people disagree and then have a discussion over there some other time However, oh, there we are. No, I I blended it out because it had the answer to my question However, when we actually implement these we have I'm just gonna call it circuit magic. So sort of understanding the logic is one part
12:28
But then actually building it we get all these weird constraints etc. Etc. Like What I what like what could go wrong and this in the second just like random ideas like has someone
12:40
Oh Set up and hold violation. There you go. That's good. I'm sorry. I ignored you because that's more useful to my Yeah, I set up a whole village. What does that mean?
13:04
Okay, I don't want to go in that much detail, but I'm glad you you do because that means because that that sort of Emphasizes my point that you have this simple Circuit and then all of a sudden you have to think of all these things So I just randomly came up with these for like where does this clock clock come from?
13:22
Like how fast is it? And that goes slightly into your your question like will the flop flip-flops keep up which is sort of a You know a unscientific way of asking the same question Like I mean how like when will I be reading these outputs because like they're not valid until I've like put in for like
13:40
Four inputs, right? So, how do I synchronize the input to the output in? All these things that I suddenly need to care about and that's really something that is sort of the art of FPGL or something, you know You have to go through and that the tools are sort of one of the biggest like personally I'm a little bit miffed by that because you know in the software world we have like, you know
14:03
GCC has come a long way recently to be I like produce nice error messages just be easy to set up and you go To a C programming tutorial you can start writing code immediately With most proprietary tool chains You will have like for example the pre the precursor to the tool called Vivado was called ice Ian with about 20 gigabytes installation
14:22
You know because it shipped all these random things Yeah, and good luck getting that run on sort of one of the unsupported OSes. I just I just pictured a random like picked a random screenshot where you sort of try and debug something that's going on on the FPGA and you will be spending a lot of time trying to sort of go through menus and
14:42
You know, that's that's just not great It's just the way it is. So there are actually some developments in open source FPGA development But they sort of target very specific chips and on that broadly applicable I hope that'll change and 20 years from now. We'll be laughing about this
15:01
If you're interested there are nice Resources EDA playground is this I showed a screenshot here is you can sort of load examples and then play around and you can press play and it'll sort of tell you what's what's going on there's sort of a So a mental shift you have to do going from
15:21
Sort of a description of a circuit to then running it sort of in time That's something that is covered in many many tutorials and I can't really do that right now If you want to get started cheaply and maybe even using free tools So yosis is a free tool chain and then there's the ico board which is a an extension for the Raspberry Pi which has a small
15:40
FPGA and it'll let you do some interesting things if you want to go for the bigger FPGA is you will have to work with the proprietary tools from Sally's and Tara they offer they both have oh, this is the ico board that they have like Evil kids like these these are slightly more expensive, but they will also let you do really interesting things You could even play around with jc2 or 4b if you have stuff like this
16:00
and then of course Use our peers like these will also let you do SDR and use FPGAs at the same time Okay, I'm already over time so very very briefly Explain RF knock which is an FPGA framework that like we as an edits research have been working on
16:22
So the problem we're trying to solve now actually I have this one slide Yeah, I this slide I carry around on every presentation I give on RF knock So if you walk out now out of this presentation, I'd like you to remember this one slide. What is RF knock it is for FPGAs what can radio is for GPPs, so We have this sort of block based modular design approach both in RF knock and can radio and then
16:47
In can as you as Marcus showed earlier in can radio We have this ability to write blocks and then data will magically go from one block to the next It's obviously not magic, but we don't have to care how it happens the same thing is true for FPGAs and when I talked earlier about the
17:01
Digital clock matter. So the digital magic that you have to do is much much reduced if you use a framework such as this and We like working together with can radio so and I'll show that in a bit Okay, so here's an example of a can radio application that would simply not work even though it's very simple So you generate data from your SDR you stream it to the computer then you calculate an FFT 10 24k, whatever
17:28
Complex somatic moving average and then you plot that so very very simple spectrum Estimation application there's a sort of DSP 101 level Already this won't work if you have a high bandwidth
17:40
Why because a you need to get data out of your SDR onto your computer fast enough, which is Maybe not even theoretically possible if you have say a gigabit ethernet connection Then you're doing all these simple number crunchy application on the computer Which you could just as well or much much much much better do on the FPGA and then here you are decimating your data
18:02
So the output of this block is very low rate but So so you can plot it, but you've done all this unnecessary calculation on your computer. Why not move all of this stuff to the FPGA and that's exactly but yeah, this is the this is the this is the important part is we want to move this To the FPGA, but we do not want to lose this modular
18:21
Um Approach right? We don't want to say okay We we fold all of this into here and then we have this new black box that does everything on the FPGA That's not the point. No, we know we want to have the same modularity, but on the FPGA so I'm gonna run a little example right now and Then this slide will actually explain the example so
18:42
My antenna So I have an embedded SDR here, which means I are crap. I forget it Fuse em, I'm sorry. I said Does someone have an ice? SMA, please
19:04
Let's just give it a truck I was I was testing this in my hotel room on and that's where my antennas right now I Always didn't Yeah, so this is an embedded Linux I've logged in you can see this is
19:24
My command prompt on on the device and I will run an application in GNU radio. Here it is which looks like this so we sample stuff then we put it through a couple of DSP applications then we put it through this block called phosphor, which by the way
19:41
Sylvan wrote It'll it'll then distribute the data through these zero and cure Connect us to my laptop The reason I need the laptop for this is because I need to visualize this and this does not have a display So then on my laptop just for clarity. I will be running this application which Just just only does visualization. You can see I have one like this is getting the data in and then here we
20:05
We visualize it Okay, so What I will do here So I'll set up my environment and So what I did earlier Was I compiled this to a Python this year to a Python script which is now living on the on the device
20:26
And I will I will execute that and I would be blown away if this works out of the box, but So
20:41
it does all kinds of output, but I'm going to scroll right to the top and Here, there we go. It said loading FPGA image Blah blah blah blah blah some bit file done and then it talks to the FPGA all of all the rest of this output Is just verbose information about Conversing with the FPGA so it's doing stuff, but we can't see it
21:03
We need something to visualize it and I will do it and do that in here There we go. So, um, we have 56 megahertz of bandwidth being processed and beautifully displayed now that doesn't sound too impressive if you know your spectrum analyzer But here we have an arm dual core running at 600 something megahertz
21:25
Like this by itself would never ever ever be able to process that that kind of data By putting it on the FPGA that works, but not only did we put it on the FPGA But we also kept it there in a sort of modular fashion that just sort of easily understandable So if I'm debugging this I could go into the is it yeah
21:44
I could go go into a radio and then sort of tap into outputs of individual components So, um, oh man, I'm stealing Nick last time. I'm sorry So this is what the application looks like
22:03
And if you know can radio then this looks familiar But we have these green arrows which notify green arrow means this is happening on the FPGA black arrow means happening on the CPU And dashed means it's going from one to the other Okay, so
22:21
This is what this is what happens internally inside the user P We have all these individual blocks and if we run the radio app, it'll simply tap out the data at the right position so This is at some point you make a choice which blocks you want to run on an FPGA so here's a random random selection and then
22:43
What Nicholas will talk about is like how Whoa And when Nicholas will talk about now is how do you actually build a block and this is sort of the internals the point We were trying The problem we're trying to solve is that all of this magic was like data comes in goes out
23:01
Like how does that happen is taken care by a framework and in this example is Like say this is the radio. It sends data to another block, which could be an FFT all you have to do is put in your Lines of error log here that'll then do the actual processing. So let me just Disconnect and
23:22
You can take over If you came to them the talk because of the name FPA Okay
24:01
Well, yeah, I hope it is okay, all right Okay, so I'm not gonna talk about what very long is or what can you do in the code because right now I'm going to talk about error of knock and in understanding the framework of error of knock is already some challenge and
24:23
Well with 20 minutes, I will be like kind of running over it. So If this works and it doesn't Jesus Martin, what do you do? Okay. No my computer just crashed
24:43
And that's a first yeah, all right, I'm gonna send it to sleep so we'll continue talking while it boots So Arab knock as Martin already said it's just a way to connect your blocks in a genu radio fashion so to say so I'm assuming that everybody has used you know radio, right and
25:04
Has anybody or everybody create your own out of three module in Geno radio? out of three modules Okay, that is less than expected actually But it's okay So the thing is that you can do the same stuff with our of knock model
25:23
That is this stuff that I'm going to be talking about When everything works and I hope it will I'm All right
25:43
Okay, so this is the outline I'm gonna start with who I am. So I am master students in KIT in Karlsruhe, Germany. I Spent six months last year and in Santa Clara being an intern in it was research All right Now I'm working for it as a customer support engineer meaning that if you have some problems with Arab knock or good whatever
26:04
from edus and you contact us with the mailing list and Sometimes I will answer because Marcus does it faster better All right, so create your own blog So the things that we want to do is to put our own application in the FPA
26:21
Same stuff that you do with Geno radio. You want to do that also in the FPA So within your radio what you do is you create some Python or C++ code and you hope it works And it will because you're really good at it But with RF knock you have to go a little bit further So we have this beautiful image that we use a lot. This is called the
26:41
Arb-knock stack. So basically what you have here in different colors is the different like interface that you're kind of working with So you have the FPA you have the UHD integration and Geno radio So FPA is what you want to have in the hardware. So that is very low That is what you want to code that is going to be your IP
27:00
But you want to connect that to your host computer if you're using for example, one of the biggest devices But if you're using an embedded device, you'd really want that not to your host but maybe with Geno radio You use the USD driver. So that is the way that you connect your FPA to the other part of the software so Then you go into Geno radio and you use your block connections and everything will be really really nicely connected
27:26
So basically that the different colors are the the way that you're working But the different blocks are kinda the amount of files that you have to modify to do that So first you have the very low file obviously because that is your IP. That's what you're writing
27:40
That is your algorithm, but then you have to tell UHD. Okay. I have a very low file. I have my FPA image I want to connect that so the first part you have the block declaration. That is an XML file normally Usually at the beginning it contains only the amount of inputs and outputs that your block has at the NOC ID The NOC ID is something really important That is the only way that your computer your driver your Geno radio will know which block are you using?
28:05
So that is like the identifier That's it and that is like the first stuff that you're using in UHD Then you have your block controller if you have more than one input you have something going on with the driver if you're actually going into the connection between the FPA and the Host you're going to have to write that
28:24
C++ file Usually you don't usually it just works with the descriptor because you have something that is called NOC script That is a way of instantiating or creating some small functions in your descriptor so that you don't really have to write a block controller, right?
28:41
Then you want to have Geno radio Like blocks that you can connect and they will look really nice. Then you have to go a step further So basically apart from that like from the orange spot is basically what? You will know until now what your module did So it's going to create a lot of files that are going to describe the block as is
29:04
At the XML basically is the one that you want to modify because if you have more inputs and more outputs You have to tell the the new radio and also it there's what you have the UHD streamer, so actually there's what you're saying What type of samples are you using if you're taking parameters from your block from your graphical interface?
29:25
And then your block code is you can also do more signal processing with you know radio after you go this the the samples That is like the basics But what happened like one year ago actually you had to know also Where those files were to be put and that was quite a challenge you had to you had to know where?
29:45
Vivado is going to look for the very look you had to know where your is actually taking the work controller from and you Had to know what your edges is first Your edges is actually the out of three module for RF knock that it is provides So there's already some blocks that are written in error knock that you can use
30:02
But also if you had an out of three module that you want to use you actually had to write everything in the same repository as your edges, and that was quite a problem because You don't really have to had different Locations for something that is only doing one application So then is where RF knock module actually comes from so if you are used if you have used your model
30:25
You will be really familiar with it because this is based on that so what it does basically is I want to create my own out of three module And then I want to have everything in one location because that is what an out of three module is so Right now is just a line of code is just a python application
30:45
If you're familiar with your model what this does is basically the same options you're going to create a module That's it. That is really easy So for example you do something like this you will create that so let's do it because I really hope that my computer doesn't crash anymore
31:02
So I have these these folders is positive the only thing that I have right now is only the presentation, right? But what I'm doing with this is always at the alias for setting up my pythons environment if you don't use pythons That is also really really useful right now So right now I have access to RF knock module and I want to create a new mode right and I want to call
31:23
Fuzzling because I am fuzzy well the name doesn't really matter, right? So I already create this and I have a whole bunch of files That are describing my block, and you're getting everything in that location, and that is great because that is what you want and
31:40
Right now I have only the module so it's the structure there is no block yet. I want to add the block, right? so every module add the Chair So I'm having a block that is going to be called chair, and it's going to do whatever So right now it's going to ask you something some stuff that you want to have maybe
32:00
So that the application knows what it is going to do so you can add some Arguments at the beginning so they are going to be automatically add Right now. I don't have any so I can skip that Quality assurance no we don't write that So This is important the knock ID
32:21
Before the the error of the module actually you had to remember your knock ID and all your files had to have the same Look ID You can choose whichever one here and the error of the module will create all the files with the same knock ID because that is What you want, right? I? Don't really know one so I skip this and it creates one for me The good thing is I don't have to remember every file that is going to be created already has it that is done
32:44
I don't care anymore Let's keep bro controllers that depends if I actually don't want to use the block controllers because I can do everything with the generic block That is something that you might want to read about. I don't have the time explaining You can escape the block the block control generation because you can do it without it
33:03
But if you create it because you don't know you're going to use it It's okay if you create it, and you don't use it is perfect. Nothing is going to go bad Same stuff with the block interface everything can be done in the XML if you know how to do it And if it's easy like you're actually doing a lot of stuff with the inputs and outputs Everything was going to be working fine without the the block interface of low contours, so it's okay
33:23
We escape it, but if you don't it's also okay, so bam. I already got a bunch of files That obviously most of them are quite familiar from you know radio, but important part is mostly this RF NOC stuff oh I miss one, but it's okay, so the XML is the one that has the NOC ID
33:44
So that's why it's part of RF NOC the rest of those are basically software But the other ones are old hardware describers So you have the very good very low file or you have the test bench and the good thing about the RF NOC mode tool They have to break them a lot of good things
34:01
But for example if you are all right now starting with the RF NOC framework It creates a block that is based on something that we call the skeleton and actually the skeleton is a full functional RF NOC module that block sorry that it will work I mean if you create something like this And you actually don't know what you're going to do
34:20
But you want to try that really eager to know what is going on you can compile this block You can create the bit file for it and actually it will do something that is basically put input into output It's really easy, but all the files that are already there are functional So you can just give it a try it will work well right out of the box So let's go back here
34:43
Now this is basically what we did Adding a bunch of files so the basic structure of the generated out of three module is Somewhat alike to the one from uni radio Important apart from those is the RF NOC folder That is this There is where all your files that are going to be FPGA related are going to be located
35:04
so you write your very log file you write your test bench you set up your make file for the test bench and Everything will be here, and you don't really have to deal with the repository for FPGA So there is no file location There is nothing else all your files are here, and they will just be called whenever they are needed they're needed
35:24
Alright, so already build a block. I've been talking a lot, but actually the block the creation of the block Taught me like less than one minute But the thing is that we want to use the FPGA because that's why we're here, right So RF NOC module doesn't do it jeez what?
35:40
All right, okay, I'm gonna run so we have something that is going to do that for you like seriously It was not that easy to do The connection with your blocks before RF NOC module right now We have something that is called USD image builder And if you were working with that until one month ago was called make the py what it does is you tell the script I'm going to create an image with this this this block, and it's like okay. I'm doing it for you. You don't have to care about it
36:08
Just an example I Created an out of the module that is in there for them I call it their full bar because whatever so FFT and window are blocks that edges provide so you don't really need to tell
36:21
The script where they are located, but you are off the module actually is nothing It's not what we found so you give that we dash dash I you say they did the device target That is the X 300 that is an ethos device dash T RF NOC image the amount of blocks that you want to have if you want to fill it with FIFO's or Or not doesn't matter
36:43
And it will do it for you, and you just have to wait like about one or two hours where it's done But it's okay So maybe some of you don't really use The command line you don't really remember the name of the block blah blah blah We still got you back because we created a GUI for that And you're gonna find it really easy to know which blocks are available
37:02
And if you add your out of T module is going to be listed there You don't have to remember what it is anymore. You have all the targets here So if you have an extra hundred you use the extra hundred if you have an e200 that is was the device That Martin was using Would you choose that and you import all your blocks into that part and you click generate generate bit file
37:21
And it's just do it for you takes a long time you have to have the vital That's the only thing But it will be for you and this button also is really interesting if you're really into uni already And you're really really new into that you can create all your blocks you have your flow graph and everything is working fine You import your GRC file here and all your blocks that are error of knock related are going to be put directly there
37:43
And you're like yeah, I have my flow graph I want the bit file for that you spam put it there, and it will do it for you And that's it I kind of run a lot maybe you have a lot of questions well, I'm open to questions yeah
38:07
The what But it was related
38:29
Yeah Well that would be more a marketing question
38:49
No as a matter of fact we are interested in all tools to make it easy to write your own implementation of the blocks and
39:02
So not we haven't looked at that specifically here, but we do not want to force everyone to write everything You know very much by hand so so tools that make easier. We're very interesting so maybe Consider yeah, I Don't know if we have time for more questions. Yeah, you have like one minute all right
39:25
Right now I mean we have this is a long time Yes Yes Yes, I Am I'm really eager to improve the to put the IP inclusion into it of model because that's what we want But I think is I'm doing my master thesis, and it's taking all sort of time, but I'm kind of
39:45
Yeah, but it's gonna be very soon
40:14
All right