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FLOSS Tools for High Level Synthesis

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FLOSS Tools for High Level Synthesis
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Integrating the FPGA into the Operating System
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611
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CC Attribution 2.0 Belgium:
You are free to use, adapt and copy, distribute and transmit the work or content in adapted or unchanged form for any legal purpose as long as the work is attributed to the author in the manner specified by the author or licensor.
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Production Year2017

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Abstract
In this talk, we will provide a brief introduction to the State-of-the-Art ofHigh Level Synthesis for FPGA, utterly dominated by privative & vendorspecific solutions but quietly becoming mainstream as algorithm accelerationbecomes a must to reach the computational power we need to move systemintelligence right to the edge. As an example of how this can be tackled from a FLOSS approach, we willprovide a practical example on how to use[HDLMake] to merge the FPGA bitstreaminto the Operating System, handling everything as a single Embedded Linuxruntime and providing a convenient abstraction to build & manage productiongrade Cyber-Physical Systems.