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Performance requirements of a quantum computer using surface code error correction

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Performance requirements of a quantum computer using surface code error correction
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48
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CC Attribution - NonCommercial - NoDerivatives 3.0 Germany:
You are free to use, copy, distribute and transmit the work or content in unchanged form for any legal and non-commercial purpose as long as the work is attributed to the author in the manner specified by the author or licensor.
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We study the various overhead costs associated with translating an abstract quantum algorithm to a practical implementation in fault-tolerant, error-corrected quantum hardware. The processes required for quantum error correction can be expensive in terms of quantum resources, and we consider the collective demands of the error correction circuits, distillation of ancilla states, and composition of arbitrary logical gates. To provide a concrete demonstration, we study a quantum computer architecture using surface code error correction, and we examine Shor's algorithm and simulation of quantum chemistry in first-quantized form as typical quantum algorithms for a large-scale quantum computer. As a consequence of this investigation, we can show that practical quantum computers executing these algorithms will require quantum hardware with physical gate operation times of less than 1 microsecond, if the calculation is to complete within 30 days for problems too difficult for existing classical processors.